Computer-science_A-level_Cie
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computers-and-components6 主题
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adders-and-circuits
Half adders
What is a half adder circuit?
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A half adder circuit is a basic digital circuit used in computation to perform the addition of two single bit numbers
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Has two inputs, usually labelled as A and B
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Produces two outputs labelled Carry out (Cout) and Sum(s)
|
A |
B |
Cout |
S |
|---|---|---|---|
|
0 |
0 |
0 |
0 |
|
0 |
1 |
0 |
1 |
|
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
0 |
|
A AND B |
A XOR B |
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Remember that you are adding together the binary numbers represented by A and B
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Create the Cout column first then for each row you can just add A and B together and write the answer in 2 bits in the Cout and S columns
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For example in row 2:
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A is 0 and B is 1 and 0+1=1
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1 = 01 in 2 bits (Cout 0 and Sum 1)
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In the last row:
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A is 1 and B is 1 and 1+1 = 2
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2 = 10 in 2 bit binary (Cout 1 and Sum 0)
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Drawing a half adder circuit
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A half adder circuit has two inputs, typically labelled as A and B, and two outputs: the Sum (S) and Carry (Cout)
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This circuit can be created using an XOR gate for the Sum output and an AND gate for the Carry output
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Label Inputs:
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Begin by drawing two lines on the left side of your paper or drawing space
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Label the top line as ‘A‘ and the bottom line as ‘B‘
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These represent your inputs
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XOR Gate (Sum):
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Draw an XOR gate (often a shape like a curved ‘D’ or a shape similar to an OR gate but with an additional curved line on the input side) in the middle of the paper or drawing space
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Connect the A and B lines to the two inputs of the XOR gate
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The output from the XOR gate is the ‘Sum‘
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Draw a line from the output of the XOR gate to the right side of your paper and label it as ‘S‘
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AND Gate (Carry):
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Draw an AND gate (typically a D-shaped symbol) above the XOR gate
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Again, connect the A and B lines to the two inputs of the AND gate
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The output from the AND gate is the ‘Carry‘
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Draw a line from the output of the AND gate to the right side of your paper and label it as ‘Cout‘

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Half Adder Logic Gates
Full adders
What is a full adder circuit?
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A full adder circuit extends the half adder to handle the addition of three bits
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Has three inputs: A, B, and an input carry (Cin)
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Produces two outputs: carry (Cout) and sum (S)
|
A |
B |
Cin |
Cout |
S |
|---|---|---|---|---|
|
0 |
0 |
0 |
0 |
0 |
|
0 |
0 |
1 |
0 |
1 |
|
0 |
1 |
0 |
0 |
1 |
|
0 |
1 |
1 |
1 |
0 |
|
1 |
0 |
0 |
0 |
1 |
|
1 |
0 |
1 |
1 |
0 |
|
1 |
1 |
0 |
1 |
0 |
|
1 |
1 |
1 |
1 |
1 |
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To easily reproduce this Truth Table, remember:
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The full adder adds up three binary inputs A,B and C
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So the answer can be 0,1,2 or 3
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For each row, add up A, B and C and the write the answer as a 2 bit binary number in the last 2 columns (Cout and Sum)
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For example in row 4, A=0, B=1 and C=1 – 0+1+1=2 which is 10 in binary, so Cout is 0 and Sum is 1
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In the last row, A=1, B=1 and C=1, 1+1+1=3 which is 11 in binary so Cout is 1 and Sum is 1
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Operation
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The “Sum” output provides the XOR of the inputs A, B, and Cin
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The “Carry” output is TRUE if at least two of the inputs A, B, and Cin are TRUE
Drawing a full adder circuit
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A full adder circuit consists of three inputs: A, B, and Carry (Cin), and two outputs: Sum (S) and Carry (Cout)
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It can be designed using two half adders and an OR gate
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Label Inputs:
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Start by drawing three lines on the left side of your paper or drawing space
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Label the top line as ‘A‘, the middle line as ‘B’, and the bottom line as ‘Cin‘
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These represent your inputs
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First Half Adder:
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Draw a half adder with A and B as inputs
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This consists of an XOR gate (for the Sum) and an AND gate (for the Carry)
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Label the output of the XOR gate as ‘Sum1‘ and the output of the AND gate as ‘Carry1‘
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Second Half Adder:
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Draw a second half adder underneath the first, using Sum1 and Cin as inputs
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Again, it consists of an XOR gate (for the Sum) and an AND gate (for the Carry)
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Label the output of the XOR gate as ‘S‘ (final Sum) and the output of the AND gate as ‘Carry2‘
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OR Gate:
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Draw an OR gate to the right of the half adders
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Connect Carry1 and Carry2 to the inputs of the OR gate
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The output of the OR gate is the final Carry (Cout)

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Full Adder Logic Gates
Responses