Computer-Science-A-level-Ocr
-
3-3-networks8 主题
-
3-2-databases7 主题
-
3-1-compression-encryption-and-hashing4 主题
-
2-5-object-oriented-languages7 主题
-
2-4-types-of-programming-language4 主题
-
2-3-software-development5 主题
-
2-2-applications-generation6 主题
-
2-1-systems-software8 主题
-
1-3-input-output-and-storage2 主题
-
1-2-types-of-processor3 主题
-
1-1-structure-and-function-of-the-processor1 主题
-
structuring-your-responses3 主题
-
the-exam-papers2 主题
-
8-2-algorithms-for-the-main-data-structures4 主题
-
8-1-algorithms10 主题
-
7-2-computational-methods11 主题
-
7-1-programming-techniques14 主题
-
capturing-selecting-managing-and-exchanging-data
-
entity-relationship-diagrams
-
data-normalisation
-
relational-databases
-
hashing
-
symmetric-vs-asymmetric-encryption
-
run-length-encoding-and-dictionary-coding
-
lossy-and-lossless-compression
-
polymorphism-oop
-
encapsulation-oop
-
inheritance-oop
-
attributes-oop
-
methods-oop
-
objects-oop
-
capturing-selecting-managing-and-exchanging-data
-
6-5-thinking-concurrently2 主题
-
6-4-thinking-logically2 主题
-
6-3-thinking-procedurally3 主题
-
6-2-thinking-ahead1 主题
-
6-1-thinking-abstractly3 主题
-
5-2-moral-and-ethical-issues9 主题
-
5-1-computing-related-legislation4 主题
-
4-3-boolean-algebra5 主题
-
4-2-data-structures10 主题
-
4-1-data-types9 主题
-
3-4-web-technologies16 主题
-
environmental-effects
-
automated-decision-making
-
computers-in-the-workforce
-
layout-colour-paradigms-and-character-sets
-
piracy-and-offensive-communications
-
analysing-personal-information
-
monitoring-behaviour
-
censorship-and-the-internet
-
artificial-intelligence
-
the-regulation-of-investigatory-powers-act-2000
-
the-copyright-design-and-patents-act-1988
-
the-computer-misuse-act-1990
-
the-data-protection-act-1998
-
adder-circuits
-
flip-flop-circuits
-
simplifying-boolean-algebra
-
environmental-effects
adder-circuits
Half Adders
What is a Half Adder Circuit?
-
Basic digital circuit used in computation to perform the addition of two single bit numbers.
-
Has two inputs, usually labelled as A and B
-
Produces two outputs labelled Carry out (Cout) and Sum(s)
|
A |
B |
Cout |
S |
|---|---|---|---|
|
0 |
0 |
0 |
0 |
|
0 |
1 |
0 |
1 |
|
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
0 |
|
A AND B |
A XOR B |
-
Remember that you are adding together the binary numbers represented by A and B
-
Create the Cout column first then for each row you can just add A and B together and write the answer in 2 bits in the Cout and S columns
-
For example in row 2, A is 0 and B is 1 and 0+1=1, which is 01 in 2 bits (Cout 0 and Sum 1)
-
In the last row, A is 1 and B is 1 and 1+1 = 2 which is 10 in 2 bit binary (Cout 1 and Sum 0)
-
Drawing a Half Adder Circuit
-
A half adder circuit has two inputs, typically labelled as A and B, and two outputs: the Sum (S) and Carry (Cout). This circuit can be created using an XOR gate for the Sum output and an AND gate for the Carry output
-
Label Inputs:
-
Begin by drawing two lines on the left side of your paper or drawing space. Label the top line as ‘A‘ and the bottom line as ‘B‘. These represent your inputs
-
-
XOR Gate (Sum):
-
Draw an XOR gate (often a shape like a curved ‘D’ or a shape similar to an OR gate but with an additional curved line on the input side) in the middle of the paper or drawing space. Connect the A and B lines to the two inputs of the XOR gate
-
The output from the XOR gate is the ‘Sum‘. Draw a line from the output of the XOR gate to the right side of your paper and label it as ‘S‘
-
-
AND Gate (Carry):
-
Draw an AND gate (typically a D-shaped symbol) above the XOR gate. Again, connect the A and B lines to the two inputs of the AND gate.
-
The output from the AND gate is the ‘Carry‘. Draw a line from the output of the AND gate to the right side of your paper and label it as ‘Cout‘

-
Half Adder Logic Gates
Full Adders
-
Extends the half adder to handle the addition of three bits
-
Has three inputs: A, B, and an input carry (Cin)
-
Produces two outputs: carry (Cout) and sum (S)
|
A |
B |
Cin |
Cout |
S |
|---|---|---|---|---|
|
0 |
0 |
0 |
0 |
0 |
|
0 |
0 |
1 |
0 |
1 |
|
0 |
1 |
0 |
0 |
1 |
|
0 |
1 |
1 |
1 |
0 |
|
1 |
0 |
0 |
0 |
1 |
|
1 |
0 |
1 |
1 |
0 |
|
1 |
1 |
0 |
1 |
0 |
|
1 |
1 |
1 |
1 |
1 |
-
To easily reproduce this Truth Table, remember:
-
The full adder adds up three binary inputs A,B and C
-
So the answer can be 0,1,2 or 3
-
For each row, add up A, B and C and the write the answer as a 2 bit binary number in the last 2 columns (Cout and Sum)
-
For example in row 4, A=0, B=1 and C=1 – 0+1+1=2 which is 10 in binary, so Cout is 0 and Sum is 1
-
In the last row, A=1, B=1 and C=1, 1+1+1=3 which is 11 in binary so Cout is 1 and Sum is 1
-
Operation
-
The “Sum” output provides the XOR of the inputs A, B, and Cin
-
The “Carry” output is TRUE if at least two of the inputs A, B, and Cin are TRUE
Drawing a Full Adder Circuit
-
A full adder circuit consists of three inputs: A, B, and Carry (Cin), and two outputs: Sum (S) and Carry (Cout)
-
It can be designed using two half adders and an OR gate.
-
Label Inputs:
-
Start by drawing three lines on the left side of your paper or drawing space. Label the top line as ‘A‘, the middle line as ‘B’, and the bottom line as ‘Cin‘. These represent your inputs
-
-
First Half Adder:
-
Draw a half adder with A and B as inputs. This consists of an XOR gate (for the Sum) and an AND gate (for the Carry). Label the output of the XOR gate as ‘Sum1‘ and the output of the AND gate as ‘Carry1‘
-
-
Second Half Adder:
-
Draw a second half adder underneath the first, using Sum1 and Cin as inputs. Again, it consists of an XOR gate (for the Sum) and an AND gate (for the Carry). Label the output of the XOR gate as ‘S‘ (final Sum) and the output of the AND gate as ‘Carry2‘
-
-
OR Gate:
-
Draw an OR gate to the right of the half adders. Connect Carry1 and Carry2 to the inputs of the OR gate. The output of the OR gate is the final Carry (Cout)

-
Full Adder Logic Gates
Worked Example

Describe how this logic circuit can be adapted to add together two 4-bit binary numbers.
4 marks
Answer:
Logic circuit adds together 2 binary digits / half adder
S gives sum, C gives carry
Two half adders can be joined together…
…with an OR gate
to form full adder
4 full adders can be used to add two four bit numbers
Carry out on one joined to carry in on next
Responses