Back to 课程

Computer-science_A-level_Cie

0% Complete
0/0 Steps
  1. computers-and-components
    6 主题
  2. logic-gates-and-logic-circuits
    2 主题
  3. central-processing-unit-cpu-architecture
    6 主题
  4. assembly-language-
    4 主题
  5. bit-manipulation
    1 主题
  6. operating-systems
    3 主题
  7. language-translators
    2 主题
  8. data-security
    3 主题
  9. data-integrity
    1 主题
  10. ethics-and-ownership
    3 主题
  11. database-concepts
    3 主题
  12. database-management-systems-dbms-
    1 主题
  13. data-definition-language-ddl-and-data-manipulation-language-dml
    1 主题
  14. computational-thinking-skills
    1 主题
  15. algorithms
    14 主题
  16. data-types-and-records
    2 主题
  17. arrays
    2 主题
  18. files
    1 主题
  19. introduction-to-abstract-data-types-adt
    1 主题
  20. programming-basics
    1 主题
  21. constructs
    2 主题
  22. structured-programming
    1 主题
  23. program-development-life-cycle
    2 主题
  24. program-design-
    2 主题
  25. program-testing-and-maintenance
    3 主题
  26. user-defined-data-types
    1 主题
  27. file-organisation-and-access-
    3 主题
  28. floating-point-numbers-representation-and-manipulation
    3 主题
  29. protocols
    2 主题
  30. circuit-switching-packet-switching
    1 主题
  31. processors-parallel-processing-and-virtual-machines
    5 主题
  32. boolean-algebra-and-logic-circuits
    4 主题
  33. purposes-of-an-operating-system-os
    3 主题
  34. translation-software
    3 主题
  35. encryption-encryption-protocols-and-digital-certificates
    3 主题
  36. artificial-intelligence-ai
    4 主题
  37. recursion
    1 主题
  38. programming-paradigms
    4 主题
  39. object-oriented-programming
    7 主题
  40. file-processing-and-exception-handling
    2 主题
  41. data-representation
    5 主题
  42. multimedia
    3 主题
  43. compression
    2 主题
  44. networks-and-the-internet
    11 主题
课 Progress
0% Complete

Cores

What is a core?

  • A core acts like a mini CPU, it can fetch, decode, and execute instructions on its own

  • Each core has its own:

    • Control Unit (CU)

    • Arithmetic Logic Unit (ALU)

    • Registers

  • A CPU with more than one core is a multicore CPU

  • Allows for parallel processing, multiple instructions are processed at the same time

  • Example:

    • A dual-core processor has 2 cores

    • A quad-core processor has 4 cores

  • More cores = better performance, especially for powerful programs

    Example:

    • A quad-core CPU running at 3GHz

    • 4 cores × 3 billion = 12 billion instructions per second

  • A dual-core processor isn’t always twice as fast as a single-core

    • Some time is used for organising tasks between cores

  • Not all tasks can be split across cores

    • Some tasks are sequential and must be done step-by-step

cpu-cores-

Clock speed

What is clock speed?

  • The clock controls the timing of operations inside the CPU

  • It constantly switches between 0 and 1, each switch is called a state change

  • A state change can represent one step in the fetch-decode-execute cycle

    • Some instructions may take more than one cycle

  • Clock speed measures how many state changes happen per second

  • 1 cycle per second = 1 Hz

  • A typical clock speed is around 2.3 GHz

    • That’s 2.3 billion cycles per second

  • A higher clock speed means the CPU can execute more instructions per second

  • This helps the computer run tasks more quickly and efficiently

Image of the CPU

Cache memory

What is cache memory?

  • Cache is part of primary storage

  • Stores frequently used data and instructions

  • Located closer to the CPU than RAM, so it’s faster to access

  • Some cache is built directly into each processor core

  • Speeds up the performance of the CPU

  • More cache = more data stored nearby = less time waiting for data from RAM

  • Example:

    • A website you visit often can be stored in the cache

    • Next time you visit, it loads faster

    • If the website updates, the cached version is updated too

Levels of cache

Level

Location

Speed

Size

Level 1 (L1)

Inside each CPU core

Fastest

Smallest

Level 2 (L2)

Inside or near each core

Fast

Medium

Level 3 (L3)

Shared by all cores

Slower than L1/L2

Largest

Diagram illustrating CPU cache levels: L1 (small, fast, per core), L2 (shared, slower, larger), L3 (slower, larger, on motherboard).
Diagram of the levels within the cache

Bus width

What is bus width?

  • Bus width is the number of bits a bus can carry at once

  • A wider bus can transfer more bits in a single operation

  • Example:

    • A 32-bit bus transfers 32 bits at a time

    • A 64-bit bus transfers 64 bits at a time

  • Increases performance, more data can be moved in the same amount of time

  • A wider data bus means:

    • Faster processing

    • More efficient memory access

  • Important for high-performance tasks like gaming, video editing, or large data processing

Responses

您的邮箱地址不会被公开。 必填项已用 * 标注